Price : INR 900/- only
EMI EMC book published in Pune India. This book provides practical aspects of EMC testing and design without resorting to theoretical derivations and formulae. After reading the book, the designer can immediately incorporate measures like filtering, shielding, grounding, cable routing and PCB design at the design stage of the product development cycle. This will save both his money and efforts that would be otherwise be required if he tries to modify a frozen design at the end of the development cycle. This book also has a chapter on CE Marking. For more information, contents and purchase please click under "links" on the right
Author : Chetan Kathalay. (e-mail: chetankathalay@gmail.com).
Following are the contents
CHAPTER 1 : INTRODUCTION TO EMI/EMC.
1.1 WHAT IS EMI/RFI?
1.2 HISTORY OF
EMI
1.3 THE PROBLEM OF EMI
1.4 EFFECTS OF EMI
1.5 NEED FOR EMC
1.6 REALISATION OF EMC
1.7 EMC TESTS AND
MEASUREMENT
1.8
ELEMENTS OF EMI
1.9 COUPLING
MECHANISMS
1.10 EMI VICTIMS
1.11.
CONCLUSION
CHAPTER 2. EMC STANDARDS
2.1 INTRODUCTION
2.2 CONTENTS OF EMC STANDARDS
2.2.1 Scope 2.2.2 Definitions:.
2.2.3 EMC Test Environment
2.2.4 Test Set-Up:
2.2.5 Limits, Severity Levels And Performance Requirements :.
2.2.6 Characteristics Of EMC Test Equipment :
2.2.7 Test Method & Results:
2.3
TYPES OF EMC STANDARDS
2.4
CIVILIAN EMC STANDARDS
2.4.1 International Electrotechnical Commission
(IEC) (Www.IEC.Ch)
2.4.2 IEC EMC Standards
2.4.3 Type Of IEC Standards
2.4.4 Basic Standards And Tc-77
2.4.5 Overview Of IEC Basic Standards
2.4.6 IEC 61000-3- Series
2.4.7 IEC 61000-4 Series Of Basic Standards
2.4.8
IEC Generic
Standards
2.4.9 CISPR Standards
2.4.10 Objectives
Of CISPR
2.4.11
Structure Of CISPR
2.4.12 Frequently
Referred CISPR Standards
2.4.13 IEC Automotive
Standards
2.4.14 Automotive Emission Standards
2.4.15
Automotive Susceptibility/Immunity Standards
2.4.17
European Standards
2.4.18
Cenelec Historical Background
2.4.19
Cenelec Structure
2.4.20
Membership
2.4.21 Other European Standards Organizations
2.4.22 The Making Of An En Standard
2.4.23 European EMC Standards
2.4.24 Federal Communcations Commission (FCC)
Standards
2.4.25 FCC Part 15 : Radio Devices
2.4.26 FCC Part
18—Industrial, Scientific, And Medical Equipment
2.4.27 FCC Procedures For Showing Conformance
2.5 MILITARY EMC
STANDARDS
2.6 INTRODUCTION TO EMC TESTING
2.6.1. Pre-Compliance And Compliance Testing
2.6.2. Emission Tests
2.6.2. Emission Tests
CHAPTER 3 CONDUCTED EMISSION (CE) MEASUREMENT
3.1
INTRODUCTION
3.2 TEST SETUP
3.3
MEASUREMENT INSTRUMENTATION
3.3.1 LISN /
A.M.N
3.3.2 LISN Equivalent Circuit.
3.3.3 Y-LISN or
Impedance Stabilising Networks (ISNs).
3.3.4 Voltage Probe.
3.3.5 Current Probe
3.4 EMI
RECEIVER
3.4.1. Input
Impedance.
3.4.2. Intermodulation products.
3.4.3. Selectivity.
3.4.4. Image frequency rejection
3.4.5. Spurious rejection
3.4.6. Pulse response
3.5. RECEIVER STAGES IN DETAIL

3.5.2
Pre-selector and RF amplifier
3.5.3 Mixer
3.5.4 IF
Amplifier
3.5.5 Detectors
3.5.6. Peak Detector
3.5.7. Quasi-peak (QP) detector
3.5.8. Average
Detector
3.5.9. RMS detector
3.5.10. RMS-average detector
3.5.11 EMI Receiver Vs Spectrum Analyzer.
3.6 UNITS OF MEASUREMENT.
3.7
CONDUCTED EMISSION LIMITS
3.8 LABORATORY TEST SETUP
3.9. EUT CONFIGURATION
3.10. MEASUREMENT PROCEDURE
3.11. DISCONTINUOUS EMISSION OR CLICKS.
3.12 MEASUREMENT OF CLICKS.
3.13 LOW FREQUENCY CONDUCTED EMISSION: HARMONICS
3.13.1 Introduction
3.13.2
Rationale for reducing harmonics
3.13.3 Harmonics
Measurement Set-up
3.13.4 Measurement
Instrumentation
3.13.5 Requirements Of Source And Meter
3.13.6 Equipment
Classification
3.13.7 Limits For Harmonic Current
3.13.8 Test duration
3.13.9. Criterion for compliance
3.14. LOW FREQUENCY CONDUCTED EMISSION:
FLICKER
3.15
TEST REPORT
3.16
REFERENCES
CHAPTER 4 RADIATED EMISSION (RE) MEASUREMENT
4.1 INTRODUCTION
4.2 BASIC TEST SETUP4.3 MEASUREMENT INSTRUMENTATION
4.3.1 EMI Receiver
4.3.2. Antennas
4.3.3. Antenna Factor (AF)
4.4 UNITS OF MEASUREMENT
4.5 FREQUENCY RANGE OF MEASUREMENT
4.6 LIMITS4.7 MEASUREMENT SITE
4.7.1. Open Area Test Site (OATS) 4.7.2 Performance Parameters for OATS – The Site Attenuation (SA)
4.7.3 Practical NSA Measurement
4.7.4 CISPR NSA requirements
4.7.5 Anechoic Chambers
4.7.6 Transverse Electro-Magnetic (TEM) CELLs
4.8. RADIATED EMISSION MEASUREMENT PROCEDURE
4.8.1 Measurement in OATS and Anechoic Chamber
4.8.2 Measurement In GTEM Cell
4.8.3 Validation Procedure for GTEM Cell
4.9 DISTURBANCE POWER MEASUREMENT
4.9.1 Instrumentation 4.9.2 Units Of Measurement
4.9.3 Clamp Transducer Factor
4.9.4 Frequency Range Of Measurement
4.9.5 Limits
4.9.6 Method Of Measurement
4.10 NEAR FIELD EMISSION MEASUREMENT
4.11 TEST REPORTS
4.12 CONCLUSION
CHAPTER 5. CONDUCTED IMMUNITY/SUSCEPTIBILITY TESTING
5.1 INTRODUCTION
5.2 GENERAL TEST SETUP
5.3 ELECTRICAL
FAST TRANSIENTS / BURST (EFT/B)
5.3.1
INTRODUCTION
5.3.2.
EFT/B PULSE SHAPE
5.3.3.
EFT/B TEST GENERATOR
5.3.4.
COUPLING/DECOUPLING NETWORK(CDN)
5.3.5.
CAPACITIVE COUPLING CLAMP
5.3.6.
LABORATORY TEST SETUP
5.3.7.
CONDUCTING AN EFT TEST
5.4
SURGE TESTING
5.4.1 INTRODUCTION
5.4.2.TYPES
OF SURGES
5.4.3.
SURGE WAVEFORMS
5.4.4. SURGE GENERATORS
5.4.5.
COUPLING – DECOUPLING NETWORKS (CDN)
5.4.6.
LABORATORY TEST SET-UP FOR SURGE
5.4.7. CONDUCTING A SURGE TEST
5.4.8. SELECTION
OF SEVERITY LEVELS FOR EFT AND SURGE TESTS.
5.5. CONDUCTED SUSCEPTIBILITY --CONTINUOUS WAVE.
5.5.1. INTRODUCTION
5.5.2. BASIC TEST SET UP.
5.5.3. TEST GENERATOR REQUIREMENTS
5.5.4. COUPLING DECOUPLING N/Ws (CDNs)
5.5.6. CURRENT CLAMP.
5.5.5. ELECTROMAGNETIC (EM) CLAMPS
5.5.7 LABORATORY SET-UP FOR CONDUCTED RF SUSCEPTIBILITY
5.5. CONDUCTED SUSCEPTIBILITY --CONTINUOUS WAVE.
5.5.1. INTRODUCTION
5.5.2. BASIC TEST SET UP.
5.5.3. TEST GENERATOR REQUIREMENTS
5.5.4. COUPLING DECOUPLING N/Ws (CDNs)
5.5.6. CURRENT CLAMP.
5.5.5. ELECTROMAGNETIC (EM) CLAMPS
5.5.7 LABORATORY SET-UP FOR CONDUCTED RF SUSCEPTIBILITY
5.5.8 TEST
SEVERITY LEVELS
5.5.9 CALIBRATING
INJECTED LEVEL
5.5.10 PERFORMING A
CONDUCTED RF TEST.
5.6 ELECTROSTATIC DISCHARGE TEST
5.6.1 INTRODUCTION

5.6.4. EFFECTS OF ESD ON ELECTRONICS
5.6.5. The Human ESD model
5.6.6. ESD SIMULATOR
5.6.7. Verification of the characteristics of the ESD generator
5.6.8.Severity Levels
5.6.9. LABORATORY TEST SETUP 5.6.10. ESD test considerations
5.6.11. Carrying out an ESD test
5.6.12. SPECIAL CONDITIONS FOR FLOATING EUTs
CHAPTER 6 : RADIATED SUSCEPTIBILITY/IMMUNITY TESTING
7.1. INTRODUCTION
8.1. INTRODUCTION
9.3 BOARD
ZONING
9.3.1. Board zoning according to
frequency
9.3.2. Board zoning –disturbed and calm zones
9.4 ASPECTS OF A GOOD PCB DESIGN
9.4.1 Digital ckt layout and noise
9.4.2 Reduction
of ground track inductance
9.4.5.
Reservoir/decoupling capacitors
9.5.1. Eliminating common impedances
9.5.2. Star or multipoint connections
9.6.
GENERAL CONSIDERATIONS FOR A PCB
9.6.2 Entry of digital and analog inputs
9.6.3. Bypass capacitors
9.7. MULTILAYER
BOARD AND HIGH SPEED PCB DESIGN
9.8 MULTILAYER
CONCEPTS
9.8.1. Board Stack-up
9.8.2. Power and ground planes
9.8.4. Reducing cross-talk –The 3W Rule
9.8.5. Guard traces
9.11.
RESONANCE BETWEEN PLANE PAIRS
9.15 ROUTING
TRACES NEAR ANTIPADS AND SLOTS
9.16. PROBLEMS WITH SPLIT PLANE
9.17. WHEN
TRACE CHANGES LAYERS
9.18.
CONNECTING DEVICES TO PLANES
9.19.
DECOUPLING CAPACITOR PLACEMENT
9.20. USING
MULTIPLE DECAPS IN PARALLEL
9.22. BOARD STACKING
9.24.1.1. SMD filter
components
CHAPTER 10. GROUNDING AND BONDING
10.2. PURPOSE OF GROUNDING
10.2.1. To prevent Shock
Hazard
10.2.2. Power Fault
Clear-out
10.3. STANDARDS REGARDING SAFETY GROUND
10.3.1.
International level
10.3.3.National level:
10.4. EQUIPMENT AND SYSTEM GROUNDING
10.5. TYPES OF GROUNDING
10.5.2. Multi
point grounding
10.9. EARTH PITS
10.10.6. Bonding
practices
11.11.1 Introduction
11.11.2. Cable Coupling
Mechanisms
11.11.3. Running Cables In An
Installation
11.11.4.Shape Of Cable Ways
11.11.8. Reducing Common Mode Coupling
11.11.9. Reducing Differential Mode Coupling
5.6.7. Verification of the characteristics of the ESD generator
5.6.8.Severity Levels
5.6.9. LABORATORY TEST SETUP 5.6.10. ESD test considerations
5.6.11. Carrying out an ESD test
5.6.12. SPECIAL CONDITIONS FOR FLOATING EUTs
5.7. EVALUATION OF TEST RESULTS
5.8. TEST
REPORT
5.9. CONCLUSION
6.1 INTRODUCTION
6.2.
GENERAL TEST SET-UP.
6.3.
SHILEDED ENCLOSURES
6.4.
ANTENNAS
6.5. SIGNAL GENERATORS AND AMPLIFIERS
6.6. MEASURING EQUIPMENT
6.7. ANCILLARY EQUIPMENT
6.8.
SEVERITY LEVELS AND FREQUENCY RANGES
6.9.
FIELD CALIBRATION.
6.10.
TEST PROCEDURE
6.11.
ALTERNATE TEST METHOD
6.12.
TESTING IN A GTEM CELL
6.13 EVALUATION OF TEST RESULTS AND TEST REPORTS
6.13 EVALUATION OF TEST RESULTS AND TEST REPORTS
CHAPTER 7. FILTERING
7.2. FILTER TYPES
7.3. FILTER IMPEDANCE
7.4. POWER LINE FILTERS
7.5. BASIC ELEMENTS OF FILTERS
7.6 POWER LINE FILTER
DESIGN
7.7. OTHER FILTER COMPONENTS
7.8. TRANSIENT SUPPRESSIONS IN RELAYS AND MOTORS
7.9. MULTISTAGE POWER LINE FILTERS
7.10. FERRITE BEADS
7.11. FILTERS FOR DC LINES
7.12. FILTERS FOR DATA CABLES
7.13. FILTERED PIN CONNECTORS
7.14. FILTER INSTALLATION
7.15 FILTER PERFORMANCE EVALUATION
7.16 CONCLUSION.
CHAPTER 8. SHIELDING
8.2. MECHANISM OF RADIATION
8.3. SHIELDING MECHANISMS
8.4 CHOICE OF SHIELD MATERIAL
8.6. PENETRATIONS AND APERTURES
8.7 LEAKAGES AT SEAMS
8.8. SHIELDS FOR CABLES
8.9.
CONCLUSION.
CHAPTER 9. PCB DESIGN FOR EMC
9.1 NEED FOR EMC DESIGN AT PCB LEVEL.
9.2 PRINTED CIRCUIT BOARD (PCB)
9.3 BOARD
ZONING
9.3.1. Board zoning according to
frequency
9.3.2. Board zoning –disturbed and calm zones
9.4 ASPECTS OF A GOOD PCB DESIGN
9.4.1 Digital ckt layout and noise
9.4.2 Reduction
of ground track inductance
9.4.3
Practical high speed ground system
9.4.4. Reduction of loop
area
9.4.5.
Reservoir/decoupling capacitors
9.4.6.
Value of decoupling capactor
9.4.7 Type of
decoupling capacitor.
9.5 COMMON IMPEDANCE
COUPLING IN PCBs
9.5.1. Eliminating common impedances
9.5.2. Star or multipoint connections
9.6.
GENERAL CONSIDERATIONS FOR A PCB
9.6.1.Supply entry
9.6.2 Entry of digital and analog inputs
9.6.3. Bypass capacitors
9.6.4. Supply distribution
9.6.5.
Decoupling and bulk decoupling capacitors
9.6.6.
Connecting load capacitors of crystal to microcontroller ground.
9.7. MULTILAYER
BOARD AND HIGH SPEED PCB DESIGN
9.8 MULTILAYER
CONCEPTS
9.8.1. Board Stack-up
9.8.2. Power and ground planes
9.8.4. Reducing cross-talk –The 3W Rule
9.8.5. Guard traces
9.9. POWER AND
GROUND PLANES
9.9.1 Functions of a ground plane.
9.9.2. Dimensions of 0V
reference plane.
9.10.
PLANE RESONANCE
9.11.
RESONANCE BETWEEN PLANE PAIRS
9.13.
HOLES AND DISCONTINUITIES IN GROUND PLANE.
9.14
ANTIPAD DESIGN
9.16. PROBLEMS WITH SPLIT PLANE
9.17. WHEN
TRACE CHANGES LAYERS
9.18.
CONNECTING DEVICES TO PLANES
9.19.
DECOUPLING CAPACITOR PLACEMENT
9.20. USING
MULTIPLE DECAPS IN PARALLEL
9.21.
DEVICE PLACEMENT
9.22. BOARD STACKING
9.22.1. Board stacking for four layer boards
9.22.3. Board stacking of eight layer PCB
9.22.2 Board stacking of six layer PCB
9.23. MICROVIA / HDI
TECHNOLOGy
9.24. SEGREGATION
9.24.1. Segregation using filters
9.24.1.1. SMD filter
components
9.24.1.2. RF reference
9.24.1.3. Filter for data lines
9.24.1.4. Filter for unshielded off board connector
9.24.2 Segregation
using board level shielding
9.24.2.1 Interconnections to components inside a
shielding can
10.1. INTRODUCTION
10.2. PURPOSE OF GROUNDING
10.2.1. To prevent Shock
Hazard
10.2.2. Power Fault
Clear-out
10.2.3. Protection against Lightning hazard
10.2.4.
Electrostatic Drainage
10.2.5. EMI
Control
10.3. STANDARDS REGARDING SAFETY GROUND
10.3.1.
International level
10.3.2.Commonwealth level
10.3.3.National level:
10.4. EQUIPMENT AND SYSTEM GROUNDING
10.5. TYPES OF GROUNDING
10.5.1. Single Point Grounding.
10.5.2. Multi
point grounding
10.6. REDUCING COMMON
GROUND IMPEDANCE COUPLING
10.7. GROUNDING OF CABLE
SHIELDS
10.8.
GROUNDING OF FARADAY SHIELDED TRANSFORMER
10.9. EARTH PITS
10.9.1 Soil treatment
10.9.2. Earth resistance measurement.
10.9.3. Why lead resistance does not matter
10.9.4. Earth resistance meter.
10.9.5. When surface is covered with concrete and
spikes cannot be driven into ground.
10.10 ELECTRICAL BONDING
10.10.1. Effects of
improper bonding
10.10.2. Behaviour of a bond at radio frequencies
10.10.3. Types of bonding
10.10.4.
Surface treatment
10.10.5. Mitigation of corrosion.
10.10.6. Bonding
practices
10.10.7.
Bonding of protective earth wire
10.10.8.
Bonding of internal protective earth wires
10.10.9. Bonding of mounting plate to the chassis/
electronic cabinet
10.10.10
Bonding screened cables with connectors
10.10.11.
Bonding screened cables that have no connectors
10.10.12.
Bonding of connector panels
10.10.13. bonding of connectors on connector panel
10.10.14 Bonding
of metal cableways.
CHAPTER 11 CABLE SELECTION AND ROUTING
11.11.1 Introduction
11.11.2. Cable Coupling
Mechanisms
11.11.3. Running Cables In An
Installation
11.11.4.Shape Of Cable Ways
11.11.5. Cable Classes
11.11.6. Type Of Cables For A Particular Class
11.11.7. Cable
Segregation
11.11.8. Reducing Common Mode Coupling
11.11.9. Reducing Differential Mode Coupling
11.11.10. Cable
Routing In An Electronics Control Panel
CHAPTER 12. CE MARKING
12.1. INTRODUCTION
12.2. THE EUROPEAN UNION BACKGROUND
12.3. EU INSTITUTIONAL STRUCTURE
12.4. TYPE OF LEGISLATIVE ACTIONS
12.5. CE MARKING AND OTHER MARKS
12.6. ESSENTIAL REQUIREMENTS OF CE MARKING
12.7. THE NEW APPROACH TO CONFORMITY
12.8. EU DIRECTIVES12.9. HARMONIZED EUROPEAN STANDARDS
12.10. THE GLOBAL APPROACH TO CONFORMITY
12.11. NOTIFIED BODIES
12.12. THE CE MARKING PROCEDURE
12.1. INTRODUCTION
12.2. THE EUROPEAN UNION BACKGROUND
12.3. EU INSTITUTIONAL STRUCTURE
12.4. TYPE OF LEGISLATIVE ACTIONS
12.5. CE MARKING AND OTHER MARKS
12.6. ESSENTIAL REQUIREMENTS OF CE MARKING
12.7. THE NEW APPROACH TO CONFORMITY
12.8. EU DIRECTIVES12.9. HARMONIZED EUROPEAN STANDARDS
12.10. THE GLOBAL APPROACH TO CONFORMITY
12.11. NOTIFIED BODIES
12.12. THE CE MARKING PROCEDURE
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